The present invention relates generally to buses for processor based systems, and more particularly to slew rate control for a driver on a bus.
Computer systems include a processor, one or more memory devices, and one or more input-output or I/O devices. The processor, the memory devices, and the I/O devices communicate with each other through a bus in the computer system. A bus is a communication link comprising a set of wires or lines connected between the devices listed above. The bus is shared by the devices as they communicate with one another. A bus may also be a set of lines connected between two functional circuits inside an integrated circuit. The bus generally contains a set of control lines and a set of data lines. The control lines carry signals representing requests and acknowledgments and signals to indicate what type of data is on the data lines. The data lines carry data, complex commands, or addresses. A separate set of lines in the bus may be reserved to carry addresses, and these are called address lines. The devices communicate with each other over the bus according to a protocol that governs which devices may use the bus at any one time. The protocol is a set of rules governing communication over the bus that are implemented and enforced by a device that is appointed a bus master.
According to the protocol, at any one time a sender may receive permission to send a signal on to a bus, and one or more receivers receive the signal. Signals are exchanged between the sender and the receiver over the bus in the following manner. The sender includes a driver, such as an output buffer, connected to each bus line it is to send signals to. Likewise, the receiver has an input buffer or another type of circuit connected to each bus line it is to receive signals from. When the sender sends a signal on a particular line it directs the appropriate output buffer to bring the line to a suitable voltage, either high or low. The receiver detects the signal to complete the communication. A reflection of the signal can take place if an output impedance of the output buffer is different from a characteristic impedance of the line. The discontinuity in the impedance causes the reflection. The signal is reflected back and forth along the line and the reflections must dissipate before a new signal can be sent on the line. This slows the operation of the bus and the computer system.
A conventional method of reducing reflection on a bus line is to damp or dissipate the reflections with a termination in an output buffer connected to the bus line. A termination is a dissipating or damping load, typically a resistive device, which has an impedance that substantially reduces a difference between the output impedance of the output buffer and the characteristic impedance of the line.
In high speed bus structures the impedance of devices connected to the bus lines must be similar to the characteristic impedance of the bus lines in order to substantially reduce signal reflection and maintain the speed of signal transfer on the bus. The speed of signal transfer also depends on a substantially uniform slew rate of all the output buffers connected to the bus lines. The slew rate is the rate of change of voltage (voltage change/time) that an output buffer can generate at a terminal on a bus line when the output buffer is changing a signal it is driving on the bus line. The output buffer may change the signal from low to high or high to low. The slew rate may be referred to as a rise time or a fall time of the signal. An optimal slew rate is selected for the bus, and all the output buffers connected to the bus are selected to have a substantially similar slew rate to support high speed signal transfer on the bus.
The selection of output buffers is difficult and expensive because the output impedance and the slew rate of an output buffer can each change due to variations in process, supply voltage, and temperature. For example, if the output buffer is fabricated as part of a circuit in an integrated circuit chip, the fabrication process parameters will affect the slew rate of the resulting output buffer as well as the resistance of transistors or resistors in the output buffer. Those skilled in the art will understand that a chip with a slow process skew operates slowly, and a chip with a fast process skew operates rapidly due to variations in the fabrication process parameters for the chip. In addition, the chip will operate more slowly with a low supply voltage and at a high temperature. Conversely, a high supply voltage and a low temperature will cause the chip to operate more rapidly. The resistance of transistors and resistors in a chip will be greater at higher temperatures.
There remains a need for output buffers in high speed bus structures that operate with an approximately uniform output impedance and slew rate independent of variations in process skew, supply voltage, and temperature. For these and other reasons there is a need for the present invention.
According to one embodiment of the present invention an output buffer includes a driver circuit having an impedance and a pre-driver circuit to control a slew rate of the driver circuit based on the impedance of the driver circuit. Advantages of the present invention will be apparent to one skilled in the art upon an examination of the detailed description.